Responsible for inventions from wireless headphones to portable computers, space exploration has long been a field responsible for driving significant technological innovation. Today, NASA is fervently continuing this trend as the organization prepares for future missions to the moon and beyond.

One of the exciting new technologies in NASA’s queue is their High-Performance Spaceflight Computer (HPSC) project. Supporting that effort, earlier this week, SiFive announced being selected by NASA to provide its RISC-V core in NASA’s HPSC.

In this article, we’ll look at the SiFive NASA news, examine NASA’s goal for the HPSC, and highlight another HPSC awarded by NASA to Microchip Technology last month.

SiFive’s RISC-V Core Headed for Space

NASA has commissioned SiFive to provide the core CPU for the HPSC, and specifically, SiFive will be using its X280 processor core. The X280 is an 8-core RISC-V processor that offers vector extensions and AI/ML edge computing optimizations.

RISC-V X280 core architecture. Image used courtesy of SiFive

X280, which is built off a 64-bit RISC-V ISA and an 8-stage dual-issue in-order pipeline, is capable of 4.6 TOPS of performance. Alongside the X280, NASA will also be leveraging four additional SiFive RISC-V cores.

Besides the performance, one major reason that NASA may be interested in SiFive’s cores is that they are RISC-V offerings. RISC-V allows NASA to benefit from the support, flexibility, and long-term viability of the open-source standard, as well as allowing for the HPSC to improve over time as the RISC-V ISA also improves. As more industry and academic institutions contribute to the RISC-V movement, the HPSC can also reap these accumulated benefits.

NASA HPSC Project

According to NASA, the HPSC project is focused on developing flight computing technology that is both highly performant and resistant to the harsh space environment. Specifically, NASA has listed its goal of HPSC achieving a 100x compute improvement over current space computers. Further, NASA is aiming to design HPSC to be highly flexible and efficient, being able to adapt to support either high-power missions that require real-time compute or low-power, deep sleep operations. 

To do this, NASA has its sights set on a computing architecture based on multicore computing chips with multiple processing cores on each chip. Along with this, NASA will aim to leverage radiation-hardened designs in order to ensure reliable computer operation even in the face of the harsh space environment. To achieve these goals, NASA has decided to contract out the HPSC development to multiple industry players, including Microchip Technology.

Microchip’s HPSC Contract

In August, NASA began announcing contract awards for the HPSC, with the first recipient being Microchip Technology. According to NASA, it will be relying on Microchip to be responsible for the architecture and design of a new processor for the HPSC. The goal is for Microchip’s processor architecture to help enable a large improvement in computing efficiency as well as offer a high level of fault-tolerance.

Microchip’s aerospace offerings. Image used courtesy of Microchip Technology

One reason that NASA may have gone with Microchip for this contract is because of the company’s prominent line of radiation-tolerant and radiation-hardened devices. Unlike other computing companies, Microchip has already proven an extensive and successful background in space-computing, making the assignment for the HPSC a realistic one for the company. The contract, which pays Microchip $50 million, expects Microchip to deliver the new processor within 3 years.

There’s no publicly announced connection between the SiFive RISC-V core selection and the Microchip HPSC processor contract, but one could easily speculate that the SiFive core will be used in Microchip’s HPSC processor design.

Innovation in Space

Space exploration has always driven technological innovation, and NASA is aiming to do exactly that with the HPSC. Thanks to contracts with Microchip and SiFive, NASA has its sights set on an 100x performance improvement over the current state-of-the-art. The hope is that these improvements will help benefit all types of future missions, including everything from Earth science missions to deep-space exploration.

Lead image used courtesy of NASA